Journals
  Publication Years
  Keywords
Search within results Open Search
Please wait a minute...
For Selected: Toggle Thumbnails
Parallel instance recovery method based on multi-thread
LU Dongdong, HE Qingfa
Journal of Computer Applications    2016, 36 (4): 1002-1007.   DOI: 10.11772/j.issn.1001-9081.2016.04.1002
Abstract502)      PDF (1114KB)(483)       Save
Concerning the low efficiency of serialized execution in database instance recovery and relying on ShenTong database, a parallel instance recovery method based on multi-thread was proposed. First, two steps including "building dirty page table" and "prefetching dirty pages" were added to the original database instance recovery model to get an improved model. Second, the improved model was processed by the multi-threaded parallel processing way and a parallel instance recovery model was generated. Finally, by using rollback segment management strategy, undo log was managed as normal data and the parallel instance recovery could be finished earlier. In the comparison experiments with the original method, Transaction Processing performance Council-C (TPC-C) benchmark test result of the parallel recovery method showed that the efficiency of reading and parsing redo log increased by 2-7 times, the efficiency of redoing increased by 4-9 times, and the total time for recovery reduced to 20%-40%. The results prove that the parallel instance recovery method can accomplish parallel processing of each stage, reduce the time needed for recovery and ensure the high efficiency of database in practical applications.
Reference | Related Articles | Metrics
Memory dependence prediction method based on instruction distance
LU Dongdong HE Jun YANG Jianxin WANG Biao
Journal of Computer Applications    2013, 33 (07): 1903-1907.   DOI: 10.11772/j.issn.1001-9081.2013.07.1903
Abstract640)      PDF (754KB)(428)       Save
Memory dependence prediction plays a very important role to reduce memory order violation and improve microprocessor performance. However, the traditional methods usually have large hardware overhead and poor realizability. Through the analysis of memory dependence's locality, this paper proposed a new memory predictor based on instruction distance. Compared to other memory dependence predictors, this predictor made full use of memory dependence's locality on instruction distance, predicted memory instruction' violation distance, controlled the speculation of a few instructions, finally deduced the number of memory order violation and improved the performance. The simulation results show that with only 1KB hardware budget, average Instruction Per Cycle (IPC) get a 1.70% speedup, and the most improvement is 5.11%. In the case of a small hardware overhead, the performance is greatly improved.
Reference | Related Articles | Metrics